Integrated circuits (IC's) often use clock signals to control the timing of the various functions they perform. Sometimes glitches and noise disrupt these clock signals, however, resulting in malfunction of the IC's. In a typical IC, clock signals are provided to the circuitry which uses them via an input buffer in order to provide adequate driving current for the clock signals, to isolate the receiving circuitry, and to protect the receiving circuitry against electrostatic discharge. Clock signals which are poorly driven or poorly routed on a circuit board may result in signal reflections from unterminated lines or noise from the input buffer's power supply. Such noise and/or reflections may be of sufficient magnitude or duration to improperly trigger the input buffer, resulting in erroneous generation of clock edges.
Problems caused by noise and reflections in clock signals have sometimes been addressed in the prior art by adding hysteresis to the circuitry which receives the clock signal. Use of a Schmitt trigger circuit is one common way of providing hysteresis. Hysteresis solutions may be inadequate for some applications, however, because they tend to slow down the response time of the input buffer. As the amount of hysteresis used increases, the response time of the input buffer also increases. This slowing may be critical in a system that is dependent upon clock edge rates. In addition, the amount of hysteresis that can be used becomes limited as power supply voltages are reduced. As a result, some glitches may be too large to be filtered by the provided amount of hysteresis. Hence, it is desirable to provide a clock noise filter which is not sensitive to the amplitude of noise or reflections in the input clock signal and which does not adversely affect the response time of the input buffer.